Table of Contents
perf Events
perf exposes three categories of events: hardware events from the CPU's performance monitoring unit (PMU), software events from the kernel, and tracepoints that instrument specific kernel functions.
Hardware events count micro-architectural phenomena:
cycles CPU clock cycles instructions retired (completed) instructions cache-references last-level cache accesses cache-misses last-level cache misses L1-dcache-load-misses L1 data cache load misses LLC-load-misses LLC (L3) load misses branches branch instructions branch-misses branch mispredictions (wrong prediction) stalled-cycles-frontend pipeline stalls waiting for instruction fetch stalled-cycles-backend pipeline stalls waiting for execution (often memory)
These come directly from the CPU's performance counters. The exact events available depend on the CPU model. Modern CPUs have hundreds of events; perf list shows all available on your machine.
Software events come from the kernel and count OS-level phenomena:
context-switches voluntary and involuntary context switches page-faults page faults (both minor and major) cpu-migrations process migrations between CPUs minor-faults page faults served from cache major-faults page faults requiring I/O
These are lower overhead than hardware events because they don't require CPU counter resources. High context switches or migrations indicate the OS scheduler is active and the process isn't pinned to a CPU.
Tracepoints instrument specific kernel functions and subsystems. They're more flexible but higher overhead than simple event counting:
syscalls:sys_enter_read entering a read syscall syscalls:sys_exit_write exiting a write syscall block:block_rq_issue block device request issued sched:sched_switch process context switch
Tracepoints are useful for diagnosing I/O behavior or scheduler interaction. In MPI jobs, they help understand which processes are blocking on syscalls while others are computing.
CPU-specific events are vendor events that expose finer details:
r01d1 Intel: LLC misses (Xeon machines, CPU-specific) PEBS: Intel: Precise Event-Based Sampling (detailed micro-architecture) IBS_OP: AMD: Instruction-Based Sampling (detailed instruction analysis)
These require reading Intel or AMD CPU documentation but provide the most detailed profiling data available.
List available events:
perf list # all events on this machine perf list cache # events matching "cache" perf list hw # hardware events only perf list sw # software events only perf list tracepoint # tracepoints only
Use in commands:
perf stat -e cycles,instructions,cache-misses ./program perf record -e L1-dcache-load-misses ./program perf stat -e syscalls:sys_enter_read -a ./program # count read syscalls system-wide
Start with high-level events (cycles, instructions, cache-misses, branches). When you've identified a problem area, drill down with more specific events (L1-dcache-load-misses for memory, stalled-cycles-backend for execution bottlenecks).
