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# Makefile

**Make** is a build automation tool that tracks dependencies and rebuilds only what changed. Define targets (build products), prerequisites (source files), and recipes (compile commands). Make avoids expensive recompilation by detecting what's out of date and rebuilding the minimum necessary.

Instead of typing compilation commands by hand or writing fragile shell scripts, write a Makefile. `make` reads it, identifies which files changed, and runs the appropriate recipes. On the next build, unchanged files are skipped—critical for large projects where recompiling everything takes minutes.

```makefile
app: main.o util.o
	gcc -o app main.o util.o

main.o: main.c
	gcc -c -o main.o main.c

util.o: util.c
	gcc -c -o util.o util.c

clean:
	rm -f *.o app
```

Run `make` to build, `make clean` to delete build artifacts. Make automatically detects which `.c` files changed and recompiles only those object files and the final executable.

## Concepts

 1. [[makefile-basics|Basics]]
 2. [[makefile-variables|Variables]]
 3. [[makefile-patterns|Patterns]]
 4. [[makefile-functions|Functions]]
 5. [[makefile-phony|Phony targets]]
 6. [[makefile-dependencies|Dependencies]]
 7. [[makefile-conditionals|Conditionals]]
 8. [[makefile-advanced|Advanced]]
 9. [[makefile-performance|Performance]]
 10. [[makefile-debugging|Debugging]]