Gate fidelity measures how accurately a physical gate implements the ideal unitary. Imperfect gates accumulate errors, reducing quantum advantage.

Average gate fidelity: $F = \frac{1}{d+1} \text{Tr}(\rho_{\text{ideal}} \rho_{\text{actual}})$ where $d$ is dimension (2 for qubits).

Process fidelity: $F_p = \text{Tr}(U_{\text{ideal}}^\dagger U_{\text{actual}}) / d$ (averages over all input states).

Fidelity ranges from 0 (completely wrong) to 1 (perfect). State-of-the-art single-qubit gates: $F > 0.999$.

Systematic errors:

• Off-resonance effects (driving at wrong frequency)
• AC Stark shift (gate strength depends on drive amplitude)
• Leakage (excitation to higher levels outside qubit subspace)

Stochastic errors:

• Spontaneous emission (decay during gate)
• Dephasing (random phase fluctuations)
• Charge/flux noise affecting qubit frequency

Before execution:

• Calibrate gate parameters to maximize fidelity
• Use optimized pulse shapes (DRAG corrections, etc.)
• Minimize gate time (less decoherence)

During execution:

• Dynamical decoupling (apply pulses to refocus noise)
• Composite gates (sequence designed to cancel errors)

After execution:

• Readout error mitigation (measure confusion matrix, invert results)
• Zero-noise extrapolation (measure at different noise levels, extrapolate)

Circuit error: errors accumulate over gates. For a circuit with $n$ gates, each with fidelity $F$, total fidelity $\approx F^n$ (worst case, uncorrelated errors).

Practical example: 1000 gates at 99.9% fidelity → $0.999^{1000} \approx 37\%$ fidelity (unacceptable). Error correction is essential for large circuits.