Table of Contents
Instruction encoding (ivss)
Instruction encoding translates a parsed operation into the fields of a machine instruction. The assembler's binary arithmetic helper writes the operation byte and selects its source and destination registers:
// gprD <= gprD OP gprS Elf_PushByte(elf, op); Elf_PushByte(elf, PACK(gprD, gprD)); Elf_PushByte(elf, PACK(gprS, 0x0)); Elf_PushByte(elf, 0x00);
For add %r2, %r1, the resulting bytes are:
50 11 20 00
0x50 selects arithmetic addition. The two nibbles of 0x11 name the destination and first input, both register one. Register two occupies the high nibble of the third byte; the remaining fields are zero.
The instruction format always occupies four bytes, but field meanings depend on the opcode and modifier. Loads and branches can use the signed twelve-bit displacement where this arithmetic instruction has zeros.
This helper encodes one instruction. An assembly statement requiring a full-width immediate or symbol address can call several encoding helpers, producing a longer sequence before the next source statement begins.
Source: asembler.c.
