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ivss-instruction-decoding

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Instruction decoding (ivss)

Instruction decoding extracts operation and operand fields from fetched bytes. ivss splits its four-byte encoding into nibbles and a signed twelve-bit displacement:

Asm_OcType  oc  = (bytes[0] >> 4) & 0xf;
Asm_ModType mod = (bytes[0] >> 0) & 0xf;
Asm_RegType ra  = (bytes[1] >> 4) & 0xf;
Asm_RegType rb  = (bytes[1] >> 0) & 0xf;
Asm_RegType rc  = (bytes[2] >> 4) & 0xf;
Asm_DispType disp = (((bytes[2] >> 0) & 0xf) << 8) | bytes[3];
if (disp >= (1 << 11)) {
    disp -= (1 << 12);
}

The final subtraction interprets encodings with the top displacement bit set as negative. For example, twelve-bit 0xffc becomes minus four, which is used by stack operations.

Bytes 50 11 20 00 decode as arithmetic addition with registers A and B set to one, C set to two, and zero displacement. Execution then performs the selected operation using those fields.

Decoding describes the machine bytes, not the original source statement. A pseudoinstruction that expanded into several encodings is fetched and decoded separately for each constituent instruction.

Source: emulator.c.

ivss-instruction-decoding.md · Last modified: by 127.0.0.1