Table of Contents

Instruction format (ivss)

The instruction format describes the four bytes fetched for each machine instruction. ivss packs an operation code, modifier, three register fields, and a signed displacement:

$$ \underbrace{OC}_{4}\; \underbrace{MOD}_{4}\; \underbrace{A}_{4}\; \underbrace{B}_{4}\; \underbrace{C}_{4}\; \underbrace{D}_{12} \qquad (32\text{ bits}) $$

The numbers indicate field widths in bits. Asm_PushInstr() emits them in byte order:

Elf_PushByte(elf, ((oc & 0xf) << 4) | ((mod & 0xf) << 0));
Elf_PushByte(elf, ((ra & 0xf) << 4) | ((rb & 0xf) << 0));
Elf_PushByte(elf, ((rc & 0xf) << 4) | (((disp >> 8) & 0xf) << 0));
Elf_PushByte(elf, disp & 0xff);

For example, add %r2, %r1 encodes as bytes 50 11 20 00. The operation adds registers B and C into A; here A and B both select %r1.

The emulator sign-extends the displacement, giving $-2048\leq D\leq2047$. Its meaning depends on the operation. Some assembly statements expand into several encoded instructions, so four-byte machine width does not imply four bytes per source statement.

Source: asembler.c, emulator.c.