Table of Contents

Instruction execution (ivss)

Instruction execution applies a decoded operation to the machine state. The arithmetic part of ivss's emulator implements addition directly:

case MOD_ARITH_ADD: {
    GPR[ra] = GPR[rb] + GPR[rc];
} break;

For the source instruction add %r2, %r1, the assembler selects A = B = 1 and C = 2. The emulator reads registers one and two and replaces register one with their sum. It does not need to know how the source line was written.

The surrounding opcode switch dispatches other operations to memory access, branch, call, control-register, or halt behavior. The program counter has already advanced during fetch, so a branch replaces the next sequential address rather than advancing it afterward.

After executing an instruction, the emulator checks pending interrupts. This ordering separates ordinary instruction effects from transfer to a handler. A source-level pseudoinstruction can span several such execution steps, including the interrupt checks between its encoded operations.

Source: emulator.c.