SIMD (2D FDTD)

SIMD lets one CPU instruction operate on multiple grid values. FDTD CUDA's OpenMP v2 marks its inner field loops for vectorization:

#pragma omp simd
for (std::size_t i = block.i0; i < block.i1; ++i) {
    const std::size_t k = row + i;
    Hx[k] = Chx1[k] * Hx[k] - Chx2[k] * invDy * (Ez[k + pitch] - Ez[k]);
}

The loop advances across one row. Each iteration writes a distinct $H_x$ value and reads electric samples that remain unchanged throughout the magnetic phase. This independence permits simultaneous lane updates.

Threads share rows through omp for; SIMD handles several columns within each thread. It does not replace the barriers between field phases. The compiler still chooses the actual vector instructions based on the build target. Compare v1 and v2 to isolate the effect of the explicit inner-loop directive.

Source: fdtd_tmz_backend_omp_v2.h.