# MOESI
**MOESI** (Modified/Owned/Exclusive/Shared/Invalid) extends [[mesi]] with an Owned state to avoid an unnecessary trip to memory when a dirty line is shared. Under plain MESI, if a core holds a line as Modified and another core requests a read, the Modified copy has to be written back to memory before the request is satisfied (or the value is supplied cache-to-cache and the original copy demoted, but memory still ends up updated in most MESI implementations). MOESI's Owned state lets that write-back be skipped entirely: the dirty data is handed directly to the requesting cache, and the original owner keeps responsibility for eventually supplying the correct value.

## The five states

 - **Modified (M)** — dirty, held only by this cache, and this cache owns the responsibility to supply correct data. Same as MESI.
 - **Owned (O)** — dirty relative to memory, but now shared with other caches holding the line as Shared. This cache is still the one responsible for eventually writing the value back.
 - **Exclusive (E)** — clean, held only by this cache. Same as MESI.
 - **Shared (S)** — clean copy, possibly shared with other caches. Under MOESI, a Shared copy is not necessarily consistent with memory if some cache holds the line as Owned; it is only guaranteed consistent with the Owner.
 - **Invalid (I)** — no valid copy. Same as MESI.

## Why skip the write-back

Without Owned, sharing a dirty line forces a round trip to memory that no one asked for: the requester wanted the data now, and memory only needed updating eventually (or never, if the line gets modified again before eviction). MOESI decouples "give the data to whoever needs it" from "commit the data to memory," letting the dirty line circulate cache-to-cache across many Shared readers while only one designated Owner is on the hook to eventually write it back (typically on eviction).

```
M, snooped read from another core -> O (this cache), S (requester)
O, snooped write from another core -> writes back if needed, invalidates
```

This is the coherence protocol used by AMD's Opteron and EPYC families, where the cache-to-cache transfer savings matter more on systems with many sockets and correspondingly expensive memory round trips.