# Machine architecture (ivss)

The **machine architecture** defines the processor state and instructions visible to an assembly program. [[ivss]] implements a hypothetical 32-bit machine with byte-addressed memory, sixteen general-purpose registers, and three control registers. Its emulator fetches one four-byte instruction at a time:

```c
unsigned char bytes[4];
Mem_ReadBytes(bytes, GPR[PC], ASM_INSTR_WIDTH);
GPR[PC] += ASM_INSTR_WIDTH;
```

`ASM_INSTR_WIDTH` is four. Advancing the program counter before execution makes it point at the following instruction; a branch or call can replace that value. The emulator begins at `0x40000000`, with the stack pointer initialized to `0x80000000`.

The [[ivss-general-purpose-registers|registers]] hold operands and addresses. [[ivss-addressing-modes|Addressing modes]] determine how instructions obtain values from them or memory. The [[ivss-instruction-format|instruction format]] encodes operations, register numbers, and displacements.

[[ivss-control-registers|Control registers]] manage interrupts, while the [[ivss-stack|stack]] holds saved values and return addresses. These are properties of the simulated machine; the host running the emulator need not execute this instruction set natively.

Source: [emulator.c](https://github.com/yanevskiv/ivss/blob/main/src/emulator.c).